Integrated Circuit Design Verification Engineer (76607)
Battelle
- Salary
- $86k - $123k
- Experience
- 3+ yrs
- Location
- Columbus, Ohio, United States
- Job type
- Full-time
Required skills
- UVM
- SystemVerilog
- SystemVerilog TLM
- C++
- C
- Git
- Python
- SVA
- UPF
- AXI
- AHB
- APB
- PCIe
- RISC-V
- FPGA
About the role
Bachelor's or Master's in Electrical/Computer Engineering or related field; 3+ years digital design verification; UVM, SystemVerilog, TLM, C++, C, Git; US citizenship and ability to obtain security clearance.
About Battelle
Independent non-profit applied science and technology research organization.
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