Digital Architect
Avicena Tech
- Experience
- 12+ yrs
- Location
- Sunnyvale, California, United States
- Job type
- Full-time
Required skills
- C
- C++
- Python
- SystemC
- SystemVerilog
- Verilog
About the role
BS or MS in Electrical or Computer Engineering with 12+ years digital ASIC design including 5+ years architecture; experience with high-speed link digital design, SystemVerilog/Verilog, C/C++ or Python modeling, multi-clock design.
About Avicena Tech
Privately held company developing microLED optical interconnects for chip-to-chip links in AI, high-performance computing, and memory systems.
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