UST
Website:
ust.com
Job details:
Role Description
Key requirements include:
- Hands-on experience in scan insertion, JTAG, ATPG DRC, and coverage analysis
- Proficiency in simulation debug with timing/SDF
- Experience with LBIST and Mixed Signal Radar ICs is highly desirable
- Ability to debug and root cause simulation failures
- Must be proactive, collaborative, and detail-oriented, capable of exercising independent judgment
- Strong interpersonal and communication skills (both oral and written)
- Self-motivated and flexible
Skills
vlsi design,jtag,scan insertion,simulation debug,coverage analysis,timing analysis
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