UST
Website:
ust.com
Job details:
Role Description
Job Description :
Layout in advanced CMOS technologies including floorplan, placement, routing, DRC, LVS etc.
Expertise on 2nm ,3nm, 5nm,7nm,14nm etc. technology nodes on various analog mixed signal blocks such as PLL, Band gap, ADC, DAC, SERDES, IO etc.
Should be well versed with tools such as Virtuoso/ XL/ EXL, IC12.1, and Calibre etc.
Requires excellent teamwork, good communication and strong problem solving skills.
Standard analog layout techniques and good understanding of physical, electrical aspects of layout.
Good understanding of reliability physics including EM, ESD, crosstalk, shielding, Latchup and deep sub-micron challenges.
Skills
vlsi design,analog layout,drc,virtuoso,calibre,
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