SyManSys Technologies India Pvt. Ltd.
Website:
symansys.com
Job details:
Experience 10-18 Years
NP -Immediate – 30 days ( Serving NP 45 days)
Interview Mode: 2 virtual rounds followed by a final Face-to-Face round
We are open to considering PAN India candidates who are willing to relocate to Bangalore
Duplicate List will be shared who will be willing to take up the pilot batch of evaluation.
Job Title : IC Design – ASIC Front End Design & Verification (Frontend)
Job Overview: As a Frontend Principal Engineer specializing in Semiconductor Chip Design, you will lead and coordinate the execution of the front-end stages of integrated circuit development. This role requires a strong technical background in digital design, verification, and project management skills. Additionally, you will oversee product support activities for both the Pre-production and post-production stages, ensuring the successful initiation, development, and sustainment of semiconductor designs.
Note –
- We are specifically looking for candidates with ASIC design & verification experience along with strong hardware expertise
- For all IC Design profiles, candidates are expected to mention the chip node size (e.g., 28nm, 40nm, 5nm, etc.).
-Plz avoid FPGA experience Profiles .
Mandatory Must‑Haves
- ASIC Front‑End Design & Verification
- RTL Design (Verilog / System Verilog).
- Verification (UVM / SV / assertions).
- Chip node size explicitly mentioned (28nm, 16nm, 7nm, 5nm etc.).
- Strong hardware / silicon exposure.
Target the RIGHT Talent Pools (Very Important)
Best Companies to Source From -Focus on product & semiconductor companies, not IT services:
Semiconductor / Product Companies - These companies mandate node‑based ASIC work, ensuring quality profiles.
- Intel
- Qualcomm
- AMD
- NVIDIA
- Broadcom
- MediaTek
- Marvell
- Samsung Semiconductor
- Apple Silicon
- Google (TPU, Silicon Team)
Design Services / ASIC Houses
- Sankalp Semiconductor
- Tessolve
- HCL ERS (Semiconductor BU)
- Capgemini Engineering (Altran)
- Siemens EDA / Mentor
- MosChip
- Saankhya Labs
Key Responsibilities: Technical Leadership and Architecture
- Design Architecture from scratch for new products and understand the specifications of the derivative products.
- RTL Design and Coding, Code Quality Management: Creating RTL Design and Coding.. Ensure highest quality by applying suitable coding standards and other techniques.
- Design Verification: Ensuring the correctness and functionality of the design through rigorous verification processes. This includes creating test benches, running simulations, and debugging the design.
- Collaboration: Working closely with other teams, such as physical design, analog IP/IC, software, and system engineering teams, to ensure seamless integration and functionality of the final product.
- Mentorship and Leadership: Leading and mentoring junior engineers, providing guidance on best practices, and ensuring the team adheres to project timelines and quality standards.
- EDA Tools Proficiency: Utilizing EDA tools for design, simulation, and verification tasks.
- Documentation: Maintaining detailed documentation of the design process, including specifications, design decisions, and verification results
- Product Support : Pre and Postproduction Stages, Support for RMA
Required Skills & Experience
- Min 8+ years of experience in System Architecture for ARM based MCU product development
- Min 8+ years of experience in RTL Design, Coding and RTL Integration,
- Strong design and debugging skills.
- Experience in handling Verification Teams. Verification environment Development , Static and Dynamic Verification, Test Management. (UPF, GLN, Test Mode)
- Experience with industry-standard EDA tools for LINT, CDC, SDC validation, and power analysis preferably Synopsis EDA.
- Exposure to Backend and Analog processes.
- Ability to collaborate effectively with backend teams (PD, DFT, and STA) to achieve timing and power closure.
- Experience in Product Support for both Pre and Postproduction Stages, Support for RMA teams.
Preferred Skills and Experience
- Min 1+ years of Project Management (Waterfall and Agile – Hybrid Methodology).
- Continuous Improvement.
- Knowledge of industry standards and best practices in semiconductor front-end design.
Qualifications:
- Masters in VLSI design from reputed universities like IIT/NIT with a background in Bachelors in Electronics and Communication, or a related field. .Job Title : Principal Engineer – Chip Design Front End
Interested Candidates share Resume at Komal@symansys.com
Click on Apply to know more.