IndieSemiC
Website:
indiesemic.com
Job details:
🚀 We Are Hiring | ASIC Design Engineer
We are looking for an experienced RTL Design Engineer with 8+ years of hands-on experience in digital design and SoC development to join our growing team.
🔹 Key Skills Required:
• Strong RTL coding expertise in SystemVerilog/Verilog
• Good understanding of AXI, APB, and AHB protocols
• Familiarity with RISC-V architecture
• Experience in CDC handling, lint sign-off, and timing closure
• Hands-on experience with SpyGlass, VCS, and PrimeTime
• Strong debugging and problem-solving skills
🔹 Responsibilities:
• Develop and implement RTL designs
• Work on SoC integration and digital design activities
• Collaborate with verification and physical design teams
• Optimize RTL for power, performance, and area
• Participate in design reviews and architecture discussions
🔹 Preferred:
• Experience in SoC development and integration
• Exposure to synthesis and low-power design concepts
If you are passionate about chip design and advanced SoC development, we would love to connect with you.
📩 Interested candidates can share their CV at hr@indiesemic.com or DM me directly.
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Click on Apply to know more.