Spintronics AI Semiconductors
Website:
spintronicsai.com
Job details:
Company Description
Spintronics AI is transforming the VLSI design process by leveraging AI and ML to deliver end-to-end design and verification solutions, from architecture to GDS. With over two decades of expertise in VLSI design, Spintronics AI specializes in high-demand areas such as full custom analog and digital layout, RTL design, physical verification, and design signoff. The company is committed to optimizing performance, power, and area (PPA) while minimizing turnaround time through innovative, world-class engineering practices. By incorporating advanced AI-driven techniques, Spintronics AI offers cost-efficient and time-effective solutions for cutting-edge semiconductor design.
Role Description:
🚀 Hiring: Analog Layout Engineers (4–8 Years) | Immediate Joiners Preferred
We are actively looking for skilled Analog Layout Engineers with 4+ to 8 years of experience to join our growing team.
đź“Ť Locations: Bangalore & Hyderabad
⏳ Notice Period: Immediate to < 30 days preferred
🔹 Key Requirements:
1. High-Speed SERDES Design
Strong hands-on experience in advanced nodes (TSMC 2nm / 3nm)
Expertise in high-speed layout techniques, matching, shielding, and parasitic optimization
Experience with full-custom analog layout flows
2. PMIC Design
Hands-on experience in power management layouts up to TSMC 7nm
Blocks like LDO, Bandgap, DC-DC converters, charge pumps, etc.
🔹 Must-Have Skills:
Strong expertise in Cadence Virtuoso
Hands-on experience in DRC, LVS, ERC sign-off flows
Deep understanding of:
Matching techniques (Common Centroid, Interdigitation)
EM/IR considerations
Latch-up prevention, Deep N-well usage
Parasitic extraction and optimization
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🔹 What We’re Looking For:
Strong ownership mindset and ability to handle blocks independently
Experience working with global teams/clients is a plus
Solid problem-solving skills in complex analog layouts
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đź’Ľ Interested candidates can share their profiles at:
đź“© venkatreddy.martha@spintronicsai.com
👉 Feel free to tag or refer someone suitable!
Qualifications
- Proficiency in Layout Design and Analog Layout techniques
- Strong understanding of Analog Circuits and Circuit Design principles
- Experience with Physical Verification processes, including DRC, LVS, and other signoff checks
- Attention to detail and ability to meet tight deadlines without compromising quality
- Familiarity with tools relevant to analog layout and physical verification, such as Cadence Virtuoso or Mentor Graphics Calibre
- Bachelor’s or Master’s degree in Electrical Engineering or related discipline
- Experience in the semiconductor or VLSI domain is a plus
Click on Apply to know more.