Sr. RTL Design Engineer
AMD
- Location
- San Jose, California, United States
- Job type
- Full-time
Required skills
- Verilog
- SystemVerilog
- UVM
- Synopsys DFT Compiler
- TestMAX
- PrimeTime
- VCS
- Cadence
- Perl
- Tcl
- Shell
- Python
About the role
Bachelor's or master's in electrical/computer engineering; strong RTL design with Verilog/SystemVerilog; experience with EDA tools, DFT, scripting (Perl, Tcl, Shell, Python); proven ability to mentor and lead technical initiatives.
About AMD
Leader in high-performance computing, graphics, and visualization technologies.
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