- Experience
- 1+ yrs
- Location
- Hyderabad, Telangana, India
- Job type
- Full-time
Required skills
- Verilog
- SystemVerilog
- UVM
- Vivado
- XDC
- SDC
- HAPS
- Zebu
- Vivado Lab Edition
- Chipscopy
- XSDB
- VCS
- Questa
- ModelSim
- Xcelium
- Python
- Tcl
- Bash
- Perl
About the role
Bachelor's or Master's in Electronics/Electrical Engineering or VLSI; 1-2 years ASIC/FPGA design and verification experience; proficiency in Verilog/SystemVerilog, UVM, and EDA tools; scripting in Python, Tcl, Bash, or Perl.
About AMD
Leader in high-performance computing, graphics, and visualization technologies.
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